1. Field of the Invention
The present invention relates to a pixel array substrate, and particularly to wherein an area of a circuit region is larger.
2. Description of Related Art
In recent years, with the progressive manufacturing techniques in optoelectronic and semiconductor fields, flat panel displays are growing rapidly, wherein liquid crystal displays (LCDs) have become the mainstream due to its low operating voltage, no radiation, light weight and small volume.
A conventional LCD mainly includes an LCD panel and a back light module, wherein the LCD panel generally comprises a thin film transistor (TFT) pixel array substrate, a color filter (CF) substrate and a liquid crystal layer disposed therebetween. Intricate circuits and components such as scan lines, data lines and pixel units are formed on the TFT array substrate by semiconductor manufacturing processes.
FIG. 1 is a schematic diagram of a conventional pixel array substrate. Referring to FIG. 1, a pixel array substrate 100 comprises a substrate 110, a plurality of pixel units, and a plurality of scan lines SL and data lines DL. The substrate 110 comprises a pixel region 112 and a circuit region 114 adjacent to the pixel region 112. The scan lines SL and data lines DL are disposed in the pixel region 112 of the substrate 110. An end of each of the scan lines SL and an end of each of the data lines DL extend into the circuit region 114, and are electrically connected to elements in a gate driving circuit area 132 and a source driving circuit area 142. Each of the pixel units comprises a TFT 122 and a pixel electrode 124, and each pixel unit is electrically connected to its corresponding scan line SL and data line DL. In addition, pixel units 120a disposed in the pixel region 112 have graphic-displaying functions, so they are called display pixel units, whereas pixel units 120b disposed in the circuit region 114 are called dummy pixel units due to the fact that they cannot display graphics.
Many electrostatic charges may be accumulated during the manufacturing process of the aforementioned pixel array substrate 100, especially when manufacturing equipment and operators touch the pixel array substrate 100 frequently. Therefore, when the electrostatic charges on the pixel array substrate 100 are accumulated to a critical amount, an electrostatic discharging phenomenon would occur.
When an electrostatic discharging phenomenon occurs, important circuits or elements on the pixel array substrate 100 may be easily damaged. Particularly, electrostatic charges accumulate easily on the ends of the scan lines SL and the data lines DL, making them especially prone to point discharging. The instantaneous high voltage from point discharging often causes short circuits in the scan lines SL and the data lines DL, leading to malfunction of the pixel array substrate 100.
In the prior art, in order to avoid the damages caused by the electrostatic discharging, it is common to dispose a shorting bar 150 in the circuit region 114 of the pixel array substrate 100. The shorting bar 150 is serially connected to gate lines and source lines through a plurality of switching elements 152. When the lines or pixel units 120a, 120b on the substrate 110 are overloaded with electrostatic charges, the switching elements 152 can be turned on to dissipate the electrostatic charges to the shorting bars 150, in order to avoid electrostatic discharging. However, this method requires more space for a circuit layout of circuit region 114.